Spiking neural networks (SNNs) have emerged as promising low-power architectures for next-generation neuromorphic {hardware} as a result of spike-based operation naturally helps spatiotemporal data processing. Amongst SNN fashions, spiking restricted Boltzmann machines (spiking RBMs) allow sampling-based studying and inference, however steady operation requires ample stochasticity on the neuron and synapse ranges. Below temporally uniform enter spike trains, corresponding to sensor-driven inputs, restricted intrinsic randomness can degrade studying efficiency. Right here, a delay-based {hardware} technique is introduced wherein synaptic propagation delay serves as a supply of stochasticity for sampling in spiking RBMs. The corresponding synaptic unit cell consists of a synapse for weight storage and a delay module for temporal stochasticity. The delay module, primarily based on serially built-in resistive random-access reminiscence (RRAM) and threshold-switching (TS) units, allows tuning of the TS turn-on delay by means of the RRAM resistance. Larger resistance will increase the imply delay, and the measured delays comply with a log-normal distribution. Compact modeling and circuit-level simulation verify compatibility of the delay conduct with CMOS neuron-synapse circuits. Utility of delay distributions to MNIST studying in spiking RBMs yields increased accuracy than each a no-delay baseline and traditional stochastic implementations primarily based on random quantity turbines. The RRAM–TS-based synaptic delay circuit subsequently presents an environment friendly {hardware} primitive for introducing stochasticity into neuromorphic programs with out complicated and power-consuming extra peripherals.
